Performance Comparison of Charge-Shared Matchline Sensing Schemes in High-Speed Ternary Content Addressable Memory (TCAM)

Abstract

Ternary content addressable memory (TCAM) is a memory that offers high speed table look-up capability for applications such as internet protocol (IP) packet forwarding and classification in network routers. A performance comparison between different Matchline sensing schemes in high speed Ternary content addressable memory (TCAM) is presented in this thesis. With the conventional current race scheme two different charge shared schemes are being compared. By segmentation of Matchline and then charge sharing reduces the power to some extent. This two charge shared schemes also improves search time and voltage margin. Simulations are performed using 180nm 1.8V CMOS logic in HSPICE. By changing the properties of different transistors, the simulated outputs were compared for better performance measurements.