Low Frequency Noise Modeling of Ferroelectric Thin Film Transistor

Abstract

Low-frequency noise (LFN) modeling and characterization in ferroelectric thin-film transistors (FeTFTs) is crucial for understanding and mitigating the effects of noise on device performance. This paper presents a comprehensive approach to LFN modeling that incorporates the unique characteristics of ferroelectric materials. Traditional TFT models are extended to include polarization-induced hysteresis, providing a more accurate representation of FeTFT behavior. Enhanced noise integration techniques are employed to account for various sources of low-frequency noise, including 1/f noise and thermal fluctuations. Parameter refinement for off current modeling is conducted to improve precision in predicting leakage currents. Additionally, advanced dynamic response models are developed to capture the timing and responsiveness of drain current under varying operational conditions. The convergence of memory window characteristics at peak gate voltages is improved to ensure reliable device operation. This work also refines the transfer characteristics equations to better reflect the low-frequency noise inherent to FeTFTs. Experimental results validate the proposed models, demonstrating significant improvements in noise characterization and device performance prediction. The findings contribute to the development of more reliable and efficient FeTFTs, suitable for applications in memory storage and low-power electronics. This thesis focuses on characterizing FeTFT, modeling the noise, as well as developing a Graphical User Interface (GUI) to simulate the memory window of the device.