Low Frequency Noise Modeling of Ferroelectric Thin Film Transistor

Shaf, Mohd Muztahid Abrar Siddique; Shams, Liman; Ahmed, Safwan

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dc.contributor.author	Shaf, Mohd Muztahid Abrar Siddique
dc.contributor.author	Shams, Liman
dc.contributor.author	Ahmed, Safwan
dc.date.accessioned	2025-03-04T08:29:06Z
dc.date.available	2025-03-04T08:29:06Z
dc.date.issued	2024-06-26
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dc.identifier.uri	http://hdl.handle.net/123456789/2345
dc.description	Supervised by Dr. Md. Masum Billah, Assistant Professor, Department of Electrical and Electronic Engineering (EEE) Islamic University of Technology (IUT) Board Bazar, Gazipur, Bangladesh This thesis is submitted in partial fulfillment of the requirement for the degree of Bachelor of Science in Electrical and Electronic Engineering, 2024	en_US
dc.description.abstract	Low-frequency noise (LFN) modeling and characterization in ferroelectric thin-film transistors (FeTFTs) is crucial for understanding and mitigating the effects of noise on device performance. This paper presents a comprehensive approach to LFN modeling that incorporates the unique characteristics of ferroelectric materials. Traditional TFT models are extended to include polarization-induced hysteresis, providing a more accurate representation of FeTFT behavior. Enhanced noise integration techniques are employed to account for various sources of low-frequency noise, including 1/f noise and thermal fluctuations. Parameter refinement for off current modeling is conducted to improve precision in predicting leakage currents. Additionally, advanced dynamic response models are developed to capture the timing and responsiveness of drain current under varying operational conditions. The convergence of memory window characteristics at peak gate voltages is improved to ensure reliable device operation. This work also refines the transfer characteristics equations to better reflect the low-frequency noise inherent to FeTFTs. Experimental results validate the proposed models, demonstrating significant improvements in noise characterization and device performance prediction. The findings contribute to the development of more reliable and efficient FeTFTs, suitable for applications in memory storage and low-power electronics. This thesis focuses on characterizing FeTFT, modeling the noise, as well as developing a Graphical User Interface (GUI) to simulate the memory window of the device.	en_US
dc.language.iso	en	en_US
dc.publisher	Department of Electrical and Elecrtonics Engineering(EEE), Islamic University of Technology(IUT), Board Bazar, Gazipur-1704, Bangladesh	en_US
dc.subject	Low Frequency Noise(LFN), FeTFT, Hafnium Zirconium Oxide(HZO), Memory Window, Hooge's Noise Model	en_US
dc.title	Low Frequency Noise Modeling of Ferroelectric Thin Film Transistor	en_US
dc.type	Thesis	en_US